Questions:

1. A digital computer has a memory unit with 24 bits per word. The instruction set consists of 150 different operations. All instructions have an operation code part (opcode) and an address part (allowing for only one address). Each instruction is stored in one word of memory. Answer the following:

a. How many bits are needed for the opcode?

b. How many bits are left for the address part of the instruction?

c. What is the largest unsigned binary number that can be accommodated in one word of memory?

2. Write a program to evaluate the arithmetic statement x = (a×( b + c ) × d - e) using a stack organized computer with zero-address instructions (so only pop and push can access memory).

3. What is the difference between using direct and indirect addressing? Give an example.

4. Suppose a byte-addressable computer using set associative cache has 221 byes of main memory and a cache of 64 blocks, where each cache block contains 4 bytes.

a. If this cache is 2-way set associative, what is the format of a memory address as seen by the cache, that is, what are the sizes of the tag, set, and offset fields?

b. If this cache is 4-way set associative, what is the format of a memory address as seen by the cache?

6. A computer has 32-bit instructions and 12-bit addresses. Suppose there are 250 two-address instructions. What is the maximum number of one-address instructions that can be added to the instruction set?

7. Suppose a disk drive has the following characteristics:

• 6 surfaces
• 16,383 tracks per surface
• 63 sectors per track
• 512 bytes/sector
• Tract-to-track seek time of 8.5 milliseconds
• Rotational speed of 7,200 RPM.

a. What is the capacity of the drive?
b. What is the access time?

8. Suppose we have the instruction LDA 800. Given the memory as follows and the base register contains the value 100.

800 900
900 1000
1000 500
1100 600
1200 800
1300 250

What would be loaded into the AC if the addressing mode for the operand is:

a. immediate
b. direct
c. indirect
d. indexed

Rationale

This assessment task covers from topic 6 to topic 9, and has been designed to ensure that you are engaging with the subject content on a regular basis. More specifically it seeks to assess your ability to:

• be able to define and appropriately use computer systems terminologies;
• be able to describe the essential elements of computer organisation and discuss how the elements function;
• be able to describe and design the basic instruction set architecture of a simple computer;
• be able to discuss various programming tools available and their relationship to the computer architecture;

1. As per given information,

The word size of the memory is 24 bits long. There are 150 operations supported by the instruction set. Each instruction has an opcode and an address part. All instructions are stored in memory.

1. As there are 150 instructions. So there will be, 8 bits for representing one operation as,
Thus, 8 bits are needed for opcode.
2. An instruction is stored in a word with 24 bits. So, there will be (24-8) = 16 bits for an address part in an instruction.
3. The largest unsigned binary number that can fit into one word of the memory is, (111111111111111111111111)2.
4. The postfix expression is, abc+xdxe-

The program is,

PUSH a

PUSH b

PUSH c

MUL

PUSH d

MUL

PUSH e

SUB

POP

3. The difference between direct and indirect addressing is, in case of direct addressing the address part of an instruction holds the address of the operand. On the other hand, in case of indirect addressing, the address part contains the address of the word in memory than contains the address of the operand.

For example, consider the following information,

 Memory Address Value 800 900 900 200

An instruction is,

In direct addressing scheme, the address part of instruction LOAD is 800. It will be treated as the address of the operand. Thus 900 will be loaded from memory as an operand.

On the other hand, in case of indirect addressing, 800 will be considered as the address of the location that contains the address of the operand. So, control will go to 800, it will fetch 900 as the address of the operand to be loaded. Then it will go to location 900 and will fetch the value 200 as operand.

1. The cache has 64 blocks, the set associative cache has 221 bytes of main memory. The memory is byte addressable. Each block has 4 bytes.
2. The cache is 2 way set associative and

The format of the memory address will be,

 Tag Set Offset 5 1 2

1. The cache is 4 way set associative. The format of the memory address will be,

 Tag Set Offset 4 2 2
• Code sharing is easier in case of dynamic linking.

1. There may be aliasing problem.
2. There may be code cracking problems.
3. The computer has 32 bit instructions and 12 bits address. There are 250 two address instructions.

So, each of the two addresses instructions will have (32 – (2x12)) = 8 bits for opcode. If there are 8 bits for opcode then there will be so, each of the two addresses instructions will have (32 – (2x12)) = 8 bits for opcode. If there are 8 bits for opcode then there will be  possible instructions. But only 250 are used. So there are 6 leftover combinations of 8 bit opcode. These 6 will be used by 1 address instructions. On the other hand each of the one address instruction will have 12 bits gained from address fields. Thus there will be maximum of  number of one address instructions.

1. The disk drive has,
2. Capacity of () bits

= (6×16383×63×512) bytes

= 3023.815 MB

1. The tract to tract seek time is 8.5 ms and rotational speed is 7200 RPM. The access time will be,

=
=

= 8.5 + 4.167 ms

= 12.667 ms.

1. The instruction is LDA 800. The value of the base register has value 100.
 Addressing Modes Calculation Immediate In immediate addressing, 800 will be considered as the operand value. So AC will have 800. Direct In direct addressing, 800 will be considered as the address of the operand. So control will fetch value from memory address 800. AC will have value 900. Indirect In indirect addressing, 800 will hold the address of the memory location that holds the address of the operand. So, control will go to 800, then it will get 900 as the location for operand. It will then fetch value from 900. AC will have value 1000. Indexed In case of indexed scheme, the address of the operand will be (800+100) = 900. AC will have value from 900. So, AC will have value 1000.

References

Hennessy, J. L., & Patterson, D. A. (2012). Computer Architecture, A Quantitative Approach (5th ed.). Elsevier.

Mano, M. (1993). Computer System Architecture. Pearson Education.

Mano, M. M. (2010). Digital Logic and Computer Design. Pearson.

Null, L., & Lobur, J. (2014). The Essentials of Computer Organization and Architecture (4th ed.). Jones & Bartlett Publishers.

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