Late Submission of Coursework Policy
Late submission of any item of coursework for each day or part thereof (or for hard copy submission only, working day or part thereof) for up to five days after the published deadline, coursework relating to modules at Levels 0, 4, 5, 6 submitted late (including deferred coursework, but with the exception of referred coursework), will have the numeric grade reduced by 10 grade points until or unless the numeric grade reaches or is 40. Where the numeric grade awarded for the assessment is less than 40, no lateness penalty will be applied.
· Late submission of referred coursework will automatically be awarded a grade of zero (0).
· Coursework (including deferred coursework) submitted later than five days (five working days in the case of hard copy submission) after the published deadline will be awarded a grade of zero (0).
· Where genuine serious adverse circumstances apply, you may apply for an extension to the hand-in date, provided the extension is requested a reasonable period in advance of the deadline.
This Assignment assesses the following module Learning Outcomes (Take these from the module DMD):
Successful students will typically:
• have a deep and systematic understanding of the fundamental principles of digital logic and data representation, and be able to describe and discuss how these principles apply to the design and operation of processors, memory, and I/O systems;
• understand the challenges involved in designing and building advanced high-performance systems, and be able to evaluate the pros and cons of specifc design decisions;
• appreciate the constraints that processor, memory, and I/O architecture put on programmers, but also how processor programming paradigms affect the design of these components.
This assignment is worth 50% of the overall assessment for this module.
Please see attached Assignment Brief for details of marking.
A note to the Students:
1. For undergraduate modules, a score above 40% represent a pass performance at honours level.
2. For postgraduate modules, a score of 50% or above represents a pass mark.
3. Modules may have several components of assessment and may require a pass in all elem
For this assignment you should write a report which describes, discusses and critically evaluates the Architectural Features of the Atmel AVR ATMEGA328p Microcontroller Integrated Circuit when used as the core of a Digital Clock application including:
1. The AVR core microprocessor architecture: Principles, registers, memory organisation etc.
2. The Atmel AVR Instruction Set: Main features and principles. In particular, which instructions would be essential and/or useful for writing an assembly language program for the ATMEGA328p microcontroller IC to be used in a Digital Clock Application
3. The included on-chip peripheral circuits, such counters, timers, ADC etc. and how they might be utilised for the Digital Clock Application.
4. The ATMEGA328p Interrupt system, how it is implemented and in particular, how Interrupts would be used in a Digital Clock Application Your report should also briefly describe and discuss the necessary external hardware peripherals (Buttons, LCD Display etc.) that would also be required for a Digital Clock system, and how these might be interfaced to and controlled programmatically by the ATMEGA328p using a minimum of the ATMEGA328p I/O connections (“pins”).
Finally, your report should critically review, evaluate and provide justified conclusions addressing the use of the ATMEGA328p microcontroller as the basis for a Digital Clock Application.